As solid-state imaging devices (image sensors) using photoelectric conversion elements detecting light and generating a charge, CMOS (complementary metal oxide semiconductor) image sensors have been put into practical use. CMOS image sensors have been widely applied as parts of digital cameras, video cameras, monitoring cameras, medical endoscopes, personal computers (PC), mobile phones and other portable terminals (mobile devices) and other various types of electronic apparatuses.
A CMS image sensor has a floating diffusion (FD) amplifier having a photodiode (photoelectric conversion element) and an FD layer (FD) for each pixel. Reading is performed by selecting a certain row in a pixel array and simultaneously reading out the pixels in a column direction, that is, a column parallel output type is the mainstream.
In this regard, for improvement of characteristics, various methods for realizing CMODS image sensors of a high quality of image having a wide dynamic range have been proposed (for example see Japanese Patent No. 4317115 (“the '115 Publication”)).
The '115 Publication describes a solid-state imaging device which is provided with photodiodes PD and storage capacities Cs and holds signal charges in the storage capacities Cs having higher capacity densities than the photodiodes PD to thereby increase the maximum signal to enable expansion of the dynamic range.
In this solid-state imaging device, at the time of high luminance, charges overflowing from the photodiodes PD are held in the storage capacities Cs. The high luminance signals overflowing to the storage capacities Cs are read out with a low conversion gain LCG (FD capacity CFd+Cs). The low luminance signals are read out with with a high conversion gain HCG (FD capacity CFd) in a high gain operation.
Further, various circuits have been proposed for the pixel signal read-out (output) circuit of a column parallel output type CMOS image sensor. Among them, one of the most advanced circuits is a circuit which is provided with an analog-to-digital converter (ADC) for each column and extracts pixel signals as digital signals (for example, see Japanese Patent Publication No. 2005-278135A (“the '135 Publication”) and Japanese Patent Publication No. 2005-295346A (“the '346 Publication”)).
In this column parallel ADC-mounting CMOS image sensor (column AD system CNbOS image sensor), a comparator compares a so-called RAMP wave and the pixel signals and performs digital CDS by a later stage counter to thereby perform AD conversion.
In this type of CMOS image sensor, however, while high speed transfer of signals is possible, there is the disadvantage that a global shutter reading operation cannot be carried out.
Contrary to this, a digital pixel sensor in which an ADC including a comparator (and further a memory part) is arranged in each pixel to also enable realization of a global shutter for executing the start of exposure and end of exposure at the same timings with respect to all pixels in the pixel array has been proposed (for example, see U.S. Pat. No. 7,164,114, B2, FIG. 4 and US 2010/0181464, A1).